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Performance analysis of protocols

PROCEEDINGS ARTICLE published in Proceedings. VLSI and Computer Peripherals. COMPEURO 89

Authors: B.H. Walke

Interleaving of Gate Sizing and Constructive Placement for Predictable Performance

PROCEEDINGS ARTICLE published April 2007 in 2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

Authors: Sungjae Kim | Eugene Shragowitz | George Karypis | Rung-Bin Lin

Realısatıon of Performance Optımısed 32-Bıt Vedıc Multıplıer

JOURNAL ARTICLE published 1 January 2023 in Journal of VLSI circuits and systems

High performance low temperature activated devices and optimization guidelines for 3D VLSI integration of FD, TriGate, FinFET on insulator

PROCEEDINGS ARTICLE published June 2015 in 2015 Symposium on VLSI Technology (VLSI Technology)

Authors: L. Pasini | P. Batude | M. Casse | B. Mathieu | B. Sklenard | F. Piegas Luce | S. Reboh | N. Bernier | C. Tabone | O. Rozeau | S. Martini | C. Fenouillet-Beranger | L. Brunet | G. Audoit | D. Lafond | F. Aussenac | F. Allain | G. Romano | S. Barraud | N. Rambal | V. Barral | L. Hutin | J-M. Hartmann | P. Besson | S. Kerdiles | M. Haond | G. Ghibaudo | M. Vinet

Low power and high performance MOSFET

PROCEEDINGS ARTICLE published January 2015 in 2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA)

0.18 /spl mu/m CMOS Technology For High-performance, Low-power, And RF Applications

PROCEEDINGS ARTICLE published 1997 in Symposium on VLSI Technology

Enhanced performance of Ag-filament threshold switching selector by rapid thermal processing

PROCEEDINGS ARTICLE published April 2018 in 2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

Authors: Qilin Hua | Huaqiang Wu | Bin Gao | He Qian

A high-performance VFO-LSIusing 2-/spl mu/m CMOS analog and digital standard cell methodology

PROCEEDINGS ARTICLE published 1988 in Symposium 1988 on VLSI Circuits

A performance driven generator for efficient testable conditional-sum-adders

PROCEEDINGS ARTICLE published in Proceedings EURO-DAC '92: European Design Automation Conference

Authors: B. Becker | P. Molitor

Post routing performance optimization via tapered link insertion and wiresizing

PROCEEDINGS ARTICLE published in Proceedings of EURO-DAC. European Design Automation Conference

Authors: T. Xue | E.S. Kuh

Lightning Talk: Power and Performance Reconciliation – from Tradeoff to Win-Win

PROCEEDINGS ARTICLE published 9 July 2023 in 2023 60th ACM/IEEE Design Automation Conference (DAC)

Authors: Jiang Hu

UltraCMOS<sup>&#x00AE;</sup> technology for high-performance switch paths and tunable components

PROCEEDINGS ARTICLE published April 2013 in 2013 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

Authors: Rodd Novak

High Performance Processor Development for Consumer Electronics Game Processor Perspective

PROCEEDINGS ARTICLE published June 2007 in 2007 IEEE Symposium on VLSI Circuits

Authors: Jeffrey D. Brown

Excursion Prevention Strategyto Increase Chip Performance by Photomask Tuning

PROCEEDINGS ARTICLE published August 2020 in 2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

Authors: Ofir Sharoni | Yael Sufrin | Avi Cohen | Rolf Seltmann | Aravind Narayana | Thomas Thamm

Performance analysis of various scheduling algorithms using FPGA platforms

PROCEEDINGS ARTICLE published January 2015 in 2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA)

Authors: Liyaqat Nazir | Roohie Naaz Mir

A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology

PROCEEDINGS ARTICLE published April 2019 in 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

Authors: Yuan-Hsi Chou | Shih-Lien L. Lu

Impact of contact and local interconnect scaling on logic performance

PROCEEDINGS ARTICLE published June 2014 in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers

Authors: S. Datta | R. Pandey | A. Agrawal | S. K. Gupta | R. Arghavani

Reconfigurable CPU Cache Memory Design: Fault Tolerance and Performance Evaluation

BOOK CHAPTER published 1997 in VLSI: Integrated Systems on Silicon

Authors: Haridimos T. Vergos | Dimitris Nikolos | Petros Mitsiadis | Chrisovalantis Kavousianos

A high performance VHDL simulator for large systems design

PROCEEDINGS ARTICLE published in Proceedings of EURO-DAC. European Design Automation Conference

Authors: S. Hodgson | Z. Shaar | A. Smith

ZnON contacts enabling high-performance 3-D InGaZnO inverters

PROCEEDINGS ARTICLE published April 2018 in 2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

Authors: Chin-I Kuan | Kang-Ping Peng | Horng-Chih Lin | Pei-Wen Li